Self-Aligned Doubled Patterning (SADP) is a type of multiple patterning used for manufacturing integrated circuits (ICs), which utilizes spacers to enhance feature density. A spacer is a layer formed on a sidewall of a patterned feature, such as, for example, a mandrel. During an SADP process, spacer layers can be removed from horizontal surfaces, leaving the layers on the sidewalls, followed by removal of the patterned feature. This results in the line density being doubled because there are two spacers for every line. SADP can be useful, for example, to define narrow gates at half an original lithographic pitch.
Line edge roughness (LER) refers to a deviation of an edge of an element in a semiconductor device from a smooth shape. LER can degrade device performance by causing variations in line width, resulting in variations in critical dimension (CD) with scaling to smaller dimensions. CD uniformity (CDU) control across a wafer is becoming increasingly difficult with increased miniaturization.
Scanner overlay refers to a scanner's ability to accurately align and print layers on top of each other. With reductions in size, overlay errors that impact chip performance and yield are more likely. For example, it has become increasingly difficult to selectively pattern lines without patterning adjacent lines. Current via self-alignment strategies allow better CD and overlay control by limiting via printing to within trenches. However, scanner overlay and patterning processes are not scaling as fast as line pitch. Some approaches to increase CDU and reduce LER are being researched, but these approaches fail to identify material sets that can be etched selectively to one another.